EDA tools are most important in every stage of the VLSI design. Most of the EDA tools used for different phases of VLSI design in the industry are complex in terms of usage and needs several weeks/months/years of experience to gain mastery.
One of the limitation to students are that most of the tools are not freely available and also are very costly to be afforded. Some of them do come with student edition and will be of here.
Here I am listing a set of web based EDA tools that are free and can be used by students for diffferent part of learning
- www.edaplayground.com –
- Available for FREE to simulate SystemVerilog based designs and to simulate full UVM verification methodology
- Most popular among students and professionals now to do a small assignment to practice while learning any concepts or to write a small snippet of code and share it over forums for clarifications
- The web based interface also has a waveform viewer that can be used to view waveforms
- http://www.edautils.com/ – EDA utilities