This contains a sample list of questions related to Digital Logic Design. Since the job of a verification engineer is to verify the functional correctness of Digital Logic, this section forms a crucial part of any interview process.
This is never a complete list, but try to focus your learning and preparation using this.
- What is the difference between Combinational and Sequential circuits?
- Simplify the following logic function f(ABC) using K-maps f(A,B,C) = ( A + B + C’) . (A + B’+ C’)
- What is the difference between “Ripple Carry Adder” and “Carry Look-ahead Generator”?
- What is the concept of “Setup” and “Hold” time?
- How can you implement and/or/not gate using NAND/NOR?
- What is the difference between flip flop and latches?
- What is the difference between synchronous reset and asynchronous reset?
- What is meant by clock domain crossing?
- Design a state machine to detect a stream of “1011” in a serial input stream?
- How many flip flops are needed to implement a 32 bit register ?
- Explain the difference between binary and gray encoding and the benefits of each?
- What is one hot encoding ?
- What is meant by race condition ?
- Design a circuit to divide a clock by 2 ? and by 3 ?
- What is 1’s complement and 2’s complement?
- Which gates are called universal gates and why?