Welcome To Verification Excellence
“Learn, Excel and Advance in Functional Verification “
ABOUT
This website is a comprehensive knowledge base for learning and enhancing the skills required for becoming an excellent Verification engineer in VLSI industry. Whether you are a recent college graduate looking to learn some industry specific skills or an experienced engineer, you will find several resources that will help you to learn continuously and enhance your skills.
BOOKS
Cracking Digital VLSI Verification Interview:
A Golden Reference guide that will help you prepare for a successful Digital VLSI Verification Interview.
Online Courses
Following self paced online courses are available and are recommended to be learned in the following order.
SOC Verification Using System Verlog
This course introduces the concepts of System on Chip Design Verification with emphasis on Functional Verification flows and methodologies.
Learning System Verilog Assertions and FCC
A course that will teach you everything about SVA and Functional coverage coding which forms the basis for the Assertion based and Coverage Driven Verification methodologies.
Learn to build OVM/UVM Testbenches from scratch
This course teaches the basic concepts of two (similar) methodologies – OVM and UVM – and helps you get started on coding and building actual testbenches from grounds up.
Cracking Programming Questions
In the present day scenario where Digital VLSI Designs are trending towards SOC designs with increased complexity, the Design Verification job is visibly becoming more and more software oriented.
TESTIMONIALS
Blogs
Implementing randc behavior using regular constraints in SystemVerilog
What is a Verification Test plan ?
How similar is an ASIC verification job compared to a Software coding profile?
View All Blog Posts