Is it knowledge about a protocol or an IP ? Or learning a new methodology or a new language? Finding corner case bugs? Thinking out of box ? – How can you become a great Verification Engineer ?
Whether you are a young engineer entering VLSI Verification industry or aspiring to build a great career or an experienced manger trying to hire great verification engineers, knowing some aspects of what it takes to become great verification engineers will be highly useful.
Based on my more than a decade of experience as Verification engineer — what I have learned in my quest for continuous improvement and what I have observed as traits of several exceptionally great verification engineers — here is a list of some of those that will help you become great verification engineers.
Solid knowledge about design under test (DUT):
Whether you are working on a protocol IP verification or one or more portions of a complex design like a CPU/networking chip/wireless chip — you need to understand all aspects of the design specification in detail. A lot of times great verification engineers understand the design details even more than the design engineers themselves. This knowledge is very important and fundamental for all aspects of verification like following:
- Defining a proper verification plan and identifying all features and corner cases for testing.
- Identifying right methodology for verifying different features and logic units— not all features can be verified using a same approach.
- Architecture and implementation of efficient testbenches — various components like drivers, checkers, monitors, coverage and efficient stimulus patterns.
- Debugging simulation failures, identifying bugs, proposing fixes etc.
Defining coverage and other metrics for Verification completeness
Mastering art of debug :
Debug is going to be part of every day job of a Verification engineer. Statistics shows that every verification engineer spends most of his time in debug when compared to other tasks. Whether you are developing a test bench, simulating a test, analyzing coverage, analyzing a test/regression failure, you will need to be persistent in debugging and root causing every issue every time. If you do this repeatedly with an attitude of continuous improvement, you will master the art of debugging over years and then all other pieces of verification will look easy. Your solid knowledge of design along with a desire to excel is going to help a long way in this.
A modern verification engineer job is demanding more of software skills on top of a fundamental understanding of hardware design concepts. Gaining good knowledge in a verification language likeSystemVerilog and a widely used methodology like UVM (Universal Verification Methodology) is only possible with good fundamentals in programming and software engineering concepts. A desire to learn and practice with an attitude for continuous improvement is key to gain mastery in these skills.
Results and Quality:
Demonstrating results with quality is a core engineering value in any discipline. Taking responsibility of tasks, finishing them on time , faster and with fewer errors and making it a habit — will always be appreciated and help in gaining respect and trust which is basis to become great verification engineers.
Quality is not an act, it is a habit. — Aristotle
More than any designation like a Technical lead or a manager, I believe leadership/mentoring is about how great engineers work on a day to day basis. Success of a project depends on the success of team and hence having an attitude to help and improve others will gain lot of credibility for you in team. Some of the areas where great verification engineers demonstrate these are following:
- Involve in design and planning phase upfront. Ask questions and clarify design and strategies, make right plan for Verification, proactively identify issues early, tackle efficiency issues over time etc are some of them.
- Help team to be productive. Participate and drive design and verification reviews, code reviews, identify and solve problems/bottlenecks in progress, adopt new and efficient methodologies and processes etc.
- Share knowledge and experience for benefit of others — through tech talks, mentoring, Q&A sessions, reviews etc
- Continuously learn from mistakes— Accept one’s own mistakes, learn from same as well as from other’s mistakes and become better every time.
Several other personality traits are also important to become great verification engineers and some of the key ones are following:
- Developing effective team interactions: Most of the times, verification engineers need to work closely with design engineers, software engineers, architects etc. Being open minded, curious, honest and clearly communicating are key for these interactions to be valuable and productive.
- Verification schedules are always long pole in the overall development life cycle. Every one would want to know when and how fast verification completes. Being focused, persevering, able to prioritize tasks, analyze risks, and make decisions are key to meet a schedule to the best realistic timeline. Ability to effectively communicate and report issues to peers and management is also equally important along with.
- Discovering and resolving all possible bugs are very crucial for the success of a tape-out and a healthy product. Being paranoid of every single failure and root cause, maintaining high standards of coding and paying attention to all details are important to maintain a high quality in every verification task.
This may not be a complete list but is a good list based on what I have learned and followed. I hope this will be useful and also provide some motivation to strive for greatness in your career as a verification engineer.
Greatness comes through continuous improvement, not immediate perfection.
The technologies and skills demanded keeps changing continuously and rapidly in the VLSI industry. Having a desire to learn, developing a passion in work and practicing the philosophy of continuous improvement will take you long way to achieve greatness.
You might also be interested to read about — Verification Engineer — Opportunities and Career Path on our blogs
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