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VLSI Product vs Service Companies

Product Companies vs Service Companies in VLSI

There are mainly two types of companies in the VLSI/Semiconductor industry. Quite often entry level engineers gets confused between these and wonder what are the differences and which one is better in terms of career.    Here are some details which hopefully will give you some insights. Product Companies : The companies designs and develops products …

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Verification Engineer Career Path

Verification Engineer Career- Opportunities and Path

Introduction One of the big job opportunities in VLSI Design spectrum is  front end verification engineer. The demand for verification engineers has been increasingly over last decade and is also getting more and more importance. Note: If you are new to VLSI Design life cycle, you might want to read  VLSI – Front end vs …

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What is a p_sequencer and an m_sequencer in UVM?

In SystemVerilog based OVM/UVM methodologies,  UVM sequences are objects with limited life time unlike a component which has a lifetime through out simulation. UVM Testbench – Sequences vs  Components Refer following standard UVM test bench diagram for a general concept.  All components like  test, env, scoreboard, agent, monitor, sequencer and driver  are derived from   uvm_component  …

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Career Opportunities

Opportunities For Electronics Engineering Graduates

This week, I got an invite to talk to a batch of final year Electronics Engineering Students who was undergoing a 4 week internship training as part of curriculum. The students have completed 6 semesters of their graduation program and completed course work on Semiconductors, Digital Electronics, Embedded Systems, Micro Controllers, Verilog, C programming and …

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Verification Validation Testing

Verification, Validation, Testing of ASIC and SOC designs – What are the differences?

Do you know differences between Verification, Validation and Testing of ASIC / SOC designs in the VLSI/chip design life cycles? If you are involved in any ASIC/SOC design life cycle, it is highly likely that you would have heard questions like – Have you verified a feature?  Is all feature testing completed?  How will you …

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